(1) Field of the Invention
The invention relates to processes for packaging multiple integrated circuit dies, and more particularly, to a method of packaging multiple integrated circuit dies on both sides of an interposer.
(2) Description of the Related Art
Integrated circuit (IC) chips have been increasing in size and function to meet the demand for the manufacture of electronic products with smaller size, lighter weight, thinner profile and low cost along with high thermal and electrical performance. To accommodate these chips in IC packaging for miniaturization, the trend of package development is moving toward stack-up dies in 3 dimensions.
U.S. Patent Application 2005/0280139 (Zhao et al) discloses a die-up array where a die is attached to one side of a stiffener and a heat slug is attached to the other side of the stiffener. U.S. Pat. No. 6,798,057 (Bolkin et al) shows a ball grid array (BGA) package having dies coupled to both sides of an interposer. Sets of two dies coupled on either side of an interposer can be stacked and interconnected using interface balls. U.S. Pat. No. 7,038,312 (Khan et al) shows a die-up package on a heat spreader or stiffener. U.S. Pat. No. 6,483,187 (Chao et al) discloses a grounded heat spreader with a substrate thereover and a die within the cavity. No stack-up dies are disclosed or suggested.
U.S. Pat. No. 6,447,321 (Perino et al) shows an IC epoxied to a base that acts as a heat spreader and is a ground plane. An IC can be within a cavity in the base. U.S. Pat. No. 5,866,943 (Mertol) describes an IC within a cavity formed by a heat spreader and a stiffener. The IC is attached to a substrate via solder balls. U.S. Patent Application 2005/0280141 (Zhang) shows a die-down package where an IC is in a cavity of a heat spreader. The IC is wire bonded to a substrate attached to the heat spreader and is further attached to an interposer via solder balls.